This invention relates generally to stack memory systems, and more specifically to a charge coupled device (CCD) stack memory organization for providing a last-in-first-out (LIFO) memory.
Charge coupled devices are well-known in the prior art. CCD's have found use in slow scan TV cameras, document reading, and other high sensitivity imaging applications. CCD's have also been used in memory systems, and for shift register applications. The CCD concept is a relatively new concept, yet as illustrated its application has spread into a number of areas.
Very basically, CCD's are fabricated as MOS or MIS integrated circuits, wherein potential wells are formed by the application of voltage pulses to the substrate, to activate MOS or MIS capacitors. Voltage charges may be inputted and shifted along various points throughout the substrate through the proper application of voltage pulses to the MIS/MOS capacitors. Refresh circuitry is required to maintain the magnitude of the voltage charges which would otherwise dissipate. Fabrication of the substrates and the means for moving the charge around the substrate are well illustrated in the following articles and patents.
Kosonocky U.S. Pat. Nos. 3,760,202 and 3,758,794 disclose the use of charge coupled devices as shift register stages. Also disclosed are signal regeneration circuits, methods and means for operating CCD's in plural phase configurations, and clocking and timing means. The above Kosonocky patents disclose CCD shift registers interconnected into rings in such a manner to provide an elongated shift register having a first-in-first-out data storage capability.
The application and technology of charge coupled devices have been discussed in a number of papers, including W.S. Boyle and G.E. Smith, "Charge-coupled Devices -- A New Approach To MIS Device Structures," IEEE Spectrum, July 1971; Altman, "The New Concept For Memory and Imaging: Charge Coupling," Electronics, June 21, 1971; J.E. Carnes and W.F. Kosonocky, "Charge-Coupled Devices and Applications," Corporate Engineering Services, RE-18-5-22, August 1972, page 78. These articles describe the physical configuration of CCD shift registers, and the required control and refresh circuitry necessary to operate the CCD registers.
It has been proposed in the prior art to use bidirectionally shifting CCD shift registers for use in memory stacks to obtain a LIFO memory operation. Bidirectional CCD shift registers are only obtainable from CCD integrated circuit chips fabricated for three or four phase timing or clock operation. A major disadvantage of three or four phase integrated circuit CCD shift registers is that the on-chip complexity is increased and the bit density per chip is decreased in comparison to two phase integrated circuit CCD shift registers. It has not proven possible to use the simpler two phase integrated circuit CCD shift registers in a bidirectional format to obtain the LIFO operation.